I'm trying to fix one of these but that's another thread. Got many Q's about this design and solid state design in general. Ok so here goes.
I'll be posting the schem later tonight as i'm on my phone right now.
First off. Can someone please explain what it means that transistors are current controlled devices?
I understand how to bias a transistor via Vbe fyi.
Q20/21 are the power devices in common collector arrangment right?
The .22 emitter resistors are ballast resistors and are there to balance the power devices better between the dual rails?
Q18/19 are the drivers?
Q16/17 are limiters? It seems as though if the signal reaches a certain point at the power devices emitters' that the limiters will turn on and via D32/33 will adjust the bias transistors Q14/15?
Let's start there. Thanks in advance for sharing knowledge.
I'll be posting the schem later tonight as i'm on my phone right now.
First off. Can someone please explain what it means that transistors are current controlled devices?
I understand how to bias a transistor via Vbe fyi.
Q20/21 are the power devices in common collector arrangment right?
The .22 emitter resistors are ballast resistors and are there to balance the power devices better between the dual rails?
Q18/19 are the drivers?
Q16/17 are limiters? It seems as though if the signal reaches a certain point at the power devices emitters' that the limiters will turn on and via D32/33 will adjust the bias transistors Q14/15?
Let's start there. Thanks in advance for sharing knowledge.
Comment