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CLCLC-type psu using capacitance multipliers

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  • CLCLC-type psu using capacitance multipliers

    Using the info learned from Merlin's new PSU book, I came up with this update to the Talon psu, which uses a CLCLC filter and a GZ34 tube rectifier.

    This will allow me to eliminate 2 chokes and a tube rectifier, keep a similar low ripple level, while still allowing sag.

    Talon schematic is here:

    http://moonguitaramps.com/images/talon_schematic.png

    ...and here is my proposed replacement - the 47R series resistors simulate the internal resistance of the GZ34 (can use higher value R's for more sag).

    The BUL312FPs have an hFE of about 9, so the equivalent capacitance for each darlington pair stage is at least 81uF (1uF x 9 x 9).

    The last three B+ nodes will use traditional RC filtering (3 x 10k/22uF in this case, like the K50 preamp)


    Please let me know if you see any stupid mistakes or major problems. Positive comments are also allowed :-)
    Thanks!!
    Last edited by Ken Moon; 02-26-2011, 12:02 PM.

  • #2
    I don't really see how that can work. The transistors aren't chokes, they can only drop voltage, and not add it from stored inductive energy. Therefore, instead of just pulling the bases up to the collectors, you have to hang them off of potential dividers to ground, to give the transistors some headroom to work with.

    Not by much, maybe a 220k to ground or whatever. You only need as much headroom as there is ripple on the supply, plus a few volts for luck. That is the advantage of the capacitance multiplier, you don't need to leave lots of headroom for line voltage variations like you do with a regulator, because it tracks the input voltage.

    If Merlin shows this method then I think he got it wrong too. Maybe he's relying on the load current and the transistor hfe to do the pulling down, but it's bad transistor design to rely on the hfe to be a particular value, because it varies so widely. You can only count on it being more than the minimum: your circuit still has to work if it's 5 times more than the minimum.

    Also, a gain of 81 isn't much. Why not use a MOSFET instead, then you can have a really high multiplication factor. We had a thread on that a while back, RG found a cheap 800V TO-220 MOSFET in stock at Mouser. FQA11N80 or something.
    "Enzo, I see that you replied parasitic oscillations. Is that a hypothesis? Or is that your amazing metal band I should check out?"

    Comment


    • #3
      Excellent!

      Thanks for replying, Steve.

      I looked back at the book, and Merlin indeed shows the basic cap multiplier circuits with just the cap between the base of the bjt and ground.

      He shows examples of using a voltage divider to set the base voltage to a certain percentage of the input voltage, as well as using a string of zeners to set the base to a certain voltage.

      The voltage divider method is also shown for MOSFET cap multipliers, to lower the base to the point where the gate voltage is always lower than the drain, even at the negative peak of the ripple component of the input signal., and under Darlington Pairs, he says "The gain of the Darlington arrangement is now so high that R2" (bottom resistor in voltage divider)"may be added to keep the base voltage below the 'valleys' of the input ripple, in the same way as for the MOSFET circuit previously."

      I don't think Merlin is relying on any particular hFE, he only mentioned that the bottom resistor in the divider may be added when the total pair's gain is very high - so I'm confused. I left it off because the gain is not very high (one feature of the BUL312FP is that the min hFE is 8 and the max is 12, and they say they have very tight hFE matching within lots (for whatever that's worth - I like them because they are fully insulated making for easy mounting).

      Merlin - help!
      Last edited by Ken Moon; 02-26-2011, 08:45 PM.

      Comment


      • #4
        Oh, well I guess try it and see if it works, and be prepared to adjust the 10k pull-up or add a resistor from the base to ground if it doesn't.

        He is right, if the gain is low, then current drawn from the emitter will drag down the capacitor on the base, and hopefully keep the base voltage below the ripple troughs, whose magnitude also depends on the current.

        But if the gain is high, that won't happen, and you will need to drag the base down a bit by some other method.

        You can calculate it by dividing the 10k resistor by worst case hfe (144) - the voltage drop across that due to the load current is the amount of sag you'll get. It has to be greater than the ripple voltage (mean to trough) on the preceding filter cap.
        "Enzo, I see that you replied parasitic oscillations. Is that a hypothesis? Or is that your amazing metal band I should check out?"

        Comment


        • #5
          Thanks again, Steve

          I'll leave room on the PCB for a resistor, then I'll tack a 500k pot in that spot at first, in series with some minimum resistance (like 100k), and adjust it while watching the output on the scope for voltage level and ripple. And of course I'll try it without the resistor too.

          The lower I pull it, though, the higher the dissipation (no problem, using heatsinks) and voltage drop (not so nice).

          So maybe somewhere between 100k and 600k I'll get good ripple rejection and a nice low voltage drop - definitely worth a try. Maybe I can even use this technique to drop the screen voltages lower, just to see how it sounds

          Should be interesting!
          Last edited by Ken Moon; 02-26-2011, 09:52 PM.

          Comment


          • #6
            to give the transistors some headroom to work with ......... You only need as much headroom as there is ripple on the supply, plus a few volts for luck. That is the advantage of the capacitance multiplier, you don't need to leave lots of headroom for line voltage variations like you do with a regulator, because it tracks the input voltage.
            Well, he did.
            If Merlin shows this method then I think he got it wrong too. Maybe he's relying on the load current and the transistor hfe to do the pulling down, but it's bad transistor design ......
            He's not. In fact, *if* he did, he would lose voltage for nothing, because the emitter would then track the base and have as much ripple as before the "regulator"
            Fact is, he does have a reference voltage below the input voltage, and it's the exact value to kill practically all ripple sawtooth waveform with nil useless loss.
            In most well designed (adequate beta) capacitance multipliers, the emitter tracks the base voltage, which is the integration (by the RC constant) of the input voltage.
            Being an integration, it will stay around the mean voltage (you might call it the DC component) of that ripple voltage, enough to kill the peaks of that sawtooth, but not the valleys, because it will stay between those values.
            Enter the extra component: the diode.
            It ensures that the capacitor takes the "most negative" value of that sawtooth , or the value in the "valley".
            Will it stay there forever? Not at all, but we only need the RC time constant to be over 10X to 20X the ripple waveform period.
            It's the exact value to kill *just* the ripple with minimal loss of useful voltage.
            Simple and brilliant. *Love* that kind of solutions.
            Want some numbers?:
            Imagine the voltage is 430V + 30V ripple above it.
            Instant voltage will go from 430 to 460V.
            The capacitor will be charged to 430V; the base will take that value, the emitter will follow 1 volt below; the transistor will absorb any voltage between 460V and 430V+its saturation voltage, a couple volts.
            Brilliant.
            Yes, junctions will lose 0.7V each; transistor will lose around 2V saturation voltage; it would be better to have a couple Volts to lose; the basic concept remains valid.
            Why not use a MOSFET instead, then you can have a really high multiplication factor.
            Maybe, but it would lose almost 4V compared to 1 or 2 diode losses.
            Anyway, it would definitely work.
            [rant mode on]
            What irks me is the name "capacitance multiplier" which it's not.
            It can accumulate no electrical charge whatsoever.
            It should be called "enhanced/amplified ripple filter" or something like that.
            Oh well.
            Juan Manuel Fahey

            Comment


            • #7
              Oh, I get it!

              I bet King Arthur gave him a knighthood for that one.
              "Enzo, I see that you replied parasitic oscillations. Is that a hypothesis? Or is that your amazing metal band I should check out?"

              Comment


              • #8
                Originally posted by J M Fahey View Post
                [rant mode on]
                What irks me is the name "capacitance multiplier" which it's not.
                It can accumulate no electrical charge whatsoever.
                It should be called "enhanced/amplified ripple filter" or something like that.
                Oh well.
                Thanks for the well-written explanation! I understand what the circuit's doing much better now

                I hate the name 'capacitance multiplier' too - it gives you the wrong impression of what the circuit is and does - who came up with that crappy name?

                The circuit seems to have been around for awhile, though few have heard of it, and
                I agree that it's a simple and innovative little circuit - I'm very anxious to see how it works in a real amp

                Comment

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