Getting double the power out of your power transformer

[nickb]

I had a thought...

Now, I bet if I told you I could get twice the power out of the HV supply without using a bigger transformer you'd tell me 'impossible', 'bull' or some such. Yes I know it might smell of perpetual motion but, I'm pretty sure it can be done.

The problem with the linear diode / capacitor kind of supply is that the current flows for just a tiny part of each half cycle of the input. This highly distorted waveform has a very high RMS value, typically around double, the DC output current. As a consequence the transformer is twice the size it needs to be.

What is needed is power factor correction and, thanks to international efficiency regulations, chips to do this are readily available. For example the ON Semi NCP1606 will, along with about ten other components all for about $15, will do it. PCB required. How it works it not really relevant.






There is a bonus advantage in the the voltage out of the transformer is not that critical. As long as the DC out of the transformer after rectification is in the range of 1x to 0.6x the required HV output that will be good enough. The attraction is you stock just one transformer and it can be used in a wide range of target amps.

This approach is, I think, a compromise between a linear supply and a full blown off line SMPS. What is does sidestep in the tricky SMPS transformer. Winding one of those requires quite a bit of skill to get good performance and make it safe. With this PFC approach, you can buy all the parts off the shelf. It may be true that it's cheaper to go full SMPS if you pay an expert to wind one for you but I've never asked the question.

[R.G.]

PFCs really are fascinating devices. It's good to be aware that the devil will still be in the details, though. The circuit really is a constantly-varying switching frequency flyback switching power supply. There are big current pulses with sharp edges and high voltage swings running around in there, so layout of the PCB that does the work is critical.

That's OK. You only have to get it right once, then do it that way every time. That's what PCBs are for.

[J M Fahey]

[ATTACH=CONFIG]43943[/ATTACH]

Thanks Nick.
You are omitting something very important: WHERE is the regular iron transformr?
I don´t see it.
At the left, feeding this circuit?
At the right, being fed from it?
Thanks.

[Dave H]

WHERE is the regular iron transformr?
I don´t see it.
At the left, feeding this circuit?
At the right, being fed from it?

The transformer would have to be on the left (I think). The output will be DC after the diode and bulk storage capacitor.

[nickb]

Thanks Nick.
You are omitting something very important: WHERE is the regular iron transformr?
I don´t see it.
At the left, feeding this circuit?
At the right, being fed from it?
Thanks.

Yes - on the left feeding the diodes.

[nickb]

Thanks Nick.
You are omitting something very important: WHERE is the regular iron transformr?
I don´t see it.
At the left, feeding this circuit?
At the right, being fed from it?
Thanks.

My apologies for not being clearer. I've drawn it showing the input transformer. I chose this particular chip as Coilcraft make a suitable boost inductor for it.

[J M Fahey]

My apologies for not being clearer. I've drawn it showing the input transformer. I chose this particular chip as Coilcraft make a suitable boost inductor for it.


[ATTACH=CONFIG]43948[/ATTACH]

Sorry but as shown I fail to see the PFC advantage.
The power transformer is still feeding the main reservoir cap C1/Cp , through a diode bridge, and in narrow pulses as before.

I asked because the P in PFC stands for "Pre" meaning "before" , and here it´s connected "after".

I guess (not my area) that expected PFC use is : Mains > PFC (creating "doctored Mains") > diode bridge > reservoir cap > SMPS switching/transforming/regulating/whatever.

Everything running at very high speeds, absolutely outside regular "iron" (laminated silicon steel) usability area.

Might be wrong, of course.

[nickb]

Sorry but as shown I fail to see the PFC advantage.
The power transformer is still feeding the main reservoir cap C1/Cp , through a diode bridge, and in narrow pulses as before.

I asked because the P in PFC stands for "Pre" meaning "before" , and here it´s connected "after".

I guess (not my area) that expected PFC use is : Mains > PFC (creating "doctored Mains") > diode bridge > reservoir cap > SMPS switching/transforming/regulating/whatever.

Everything running at very high speeds, absolutely outside regular "iron" (laminated silicon steel) usability area.

Might be wrong, of course.

That first cap is very small in value. As a consequence the voltage across it is essentially a rectified sine wave. The PFC chip is aware of this voltage and modulates the average current through the inductor so that it has the same shape. This is the condition required for a low power factor and that is what makes it efficient.

The "P" stands for power not "pre".

The topology is: mains -> diode bridge-> PFC -> bulk caps., so if the transformer is located on the mains side it is operating at the mains frequency, which is rather the point of the exercise.

[darkfenriz]

Hi Nick


Good creative thinking indeed. However there are at least two problems with any practical implementation of your idea:

1. Your 'double' estimation feels a bit optimistic.
2. PFC circuitry results in a lot of triangular current waveforms at dozens of kHz. It is 'sine'-ish current only at 50/60Hz but in the upper band there's a lot of rubbish superimposed. That's unless you go for a very big choke and a continuous mode PFC and/or heavy LC filtering in front of active PFC circuitry. Unfortunately most controllers and schemes are now critical conduction mode, which means the current is really triangular and going up to the peak and back to zero every (10's of kHz) PFC cycle. That would stress the big iron power transformer and most probably be lost in eddy currents.

[nickb]

Hi Nick


Good creative thinking indeed. However there are at least two problems with any practical implementation of your idea:

1. Your 'double' estimation feels a bit optimistic.
2. PFC circuitry results in a lot of triangular current waveforms at dozens of kHz. It is 'sine'-ish current only at 50/60Hz but in the upper band there's a lot of rubbish superimposed. That's unless you go for a very big choke and a continuous mode PFC and/or heavy LC filtering in front of active PFC circuitry. Unfortunately most controllers and schemes are now critical conduction mode, which means the current is really triangular and going up to the peak and back to zero every (10's of kHz) PFC cycle. That would stress the big iron power transformer and most probably be lost in eddy currents.

Double is a realistic figure IMHO. If I gave an example it might help. A bridge rectifier fed from a transformer with 10V peak output and a series resistance of 0.1 ohm will have 2.4A rms in the transformer when feeding a 1A load with a 10,000uF cap.

Yes, the current waveforms are triangular. Continuous conduction mode is preferable, but not required, in any case we have choice over the chip and the inductance. For this chip, 25OW IIRC, the inductor comes out around 330uH Coilcraft GA2972-AL PFC Boost Inductor for ON Semiconductor NCP1606 There are even other topologies that could help.

Your point about high frequencies in the transformer is interesting. The small cap on the input after the bridge together with the series impedance will reduce the HF current in the transformer. More filtering maybe required. Definitely an area of concern though that needs consideration. Thanks for you thoughts.

Addendum:
After some reflection, I really don't think the HF currents are an issue for the transformer. The flux in the core depends only on the excitation voltage which is at the power line frequency. Of more concern is that you don't want to have that crud go out the power line so a common mode choke and bypass caps will be desirable. I'll have to build one and get measuring.

[trobbins]

Nick, was your target for transistor amplifier bus voltage, or for B+ of a valve amplifier?

Working over the full half-sine waveform will require a large duty-cycle and/or frequency range. Normally the power draw through the half-sine follows the voltage, so the half sine doesn't get to zero as the buffer capacitor has to be a reasonable size to offset the voltage ripple occurring. I think a goodly RC snubber across the secondary winding would be needed to manage the leakage inductance which will be partly a player in every switching cycle. It would be interesting to see if the main bridge diodes stay in full conduction for their mains half-cycle, or experience a reverse bias transient each switching cycle.

[darkfenriz]

By all means, build it and show us all

It is definitely a gray area between linear and switched mode, which isn't much explored so far. From my humble experience in the field iron linear transformers will be in their parasitic mode at switching frequency, so expect couple of dozens of microhenries there, maybe more. I've seen switched mode budget designs where that linear transformer inductance was used in lieu of what should be a proper smps choke. As wrong as it feels it did work...

As you already know you'll get some extras such as improved regulation (maybe even universal input), lower power bill etc.

Out of curiosity: how are you going to provide vcc for the chip?

[nickb]

Nick, was your target for transistor amplifier bus voltage, or for B+ of a valve amplifier?

Working over the full half-sine waveform will require a large duty-cycle and/or frequency range. Normally the power draw through the half-sine follows the voltage, so the half sine doesn't get to zero as the buffer capacitor has to be a reasonable size to offset the voltage ripple occurring. I think a goodly RC snubber across the secondary winding would be needed to manage the leakage inductance which will be partly a player in every switching cycle. It would be interesting to see if the main bridge diodes stay in full conduction for their mains half-cycle, or experience a reverse bias transient each switching cycle.

Tube amp target, but it doesn't fundamental matter, I don't think.

This particular chip has a fixed frequency and is also designed to have a wide duty cycle ratio precisely to cope with the high Vout / Vin ratio. Obviously there comes a point where is runs out and that sets a limit to the THD of the waveform. It still a high improvement on the alternative

There are no high di/dt currents due to the boost inductor giving linear ramps therefore I would not anticipate and voltage spikes from the transformer leakage inductance. Still, I'm expecting the unexpected...

[nickb]

By all means, build it and show us all

Out of curiosity: how are you going to provide vcc for the chip?

Details, details..

It needs a nominal 12V at 2mA. I could steal that off the bias winding. Even if I took if off the input HV via a big dropper the loss would be just 0.6W. I can live with that.

There also a TI chip candidate which will allow be to use a bigger inductor, will run in continuous mode and get the ripple current below 40% of the peak. I will probably have to wind my own inductor. That is easy, especially compared to winding a SMPS transformer.

I will try this out but it will be while as I have many other projects to finish off right now.

[R.G.]

Let's do some thinking about this.

The intent of power factor correction is to make current flow in an approximately sine wave fashion, not the big-pulse-at-the-peak way it naturally does with capacitor input rectifiers. They do this by running from a full-wave rectified DC source, and using switching step-up techniques to boost the voltage from the lower portions of the FWR sine up to the same voltage as the peak that the rectifiers are making from the peaks of the incoming sine waves.

This process forces the available current dumped into the first filter cap to follow the sine format of the voltage. So the current as seen in the incoming AC line approximates a sine wave. The current is corrected to look much like the current into a resistive load, both in value and in phase shift.

This current is necessarily a switched approximation of the smooth resistive sine current that would happen with a resistive load, but it's much better in terms of loading on the AC mains than either rectifier/cap filter or inductive motor loads, which are the other big user. As with all digital approximations to analog waveforms, there are stairsteps, and sudden transitions on the edges of the stairsteps.

The power delivered to the hypothetical load will inevitably approximate that delivered to a resistor. We can calculate the difference from a rectifier/filter by comparing it to a resistive load. These numbers were well worked out in the early 1900s. A DC power source delivers power to a resistor that is P=I²R. For an AC power source, the current becomes the RMS value of the AC current. A transformer's output power is dependent largely on the Irms it can handle, because its power limit is thermal - how hot can it get? - and the RMS current in the windings is what heats the windings. So a transformer's power capability is determined by its Irms.

In a full wave rectifier system, the capacitor messes with the RMS current from the transformer. It does this by forcing the current to flow into the cap only when the voltage in the incoming AC half-sine is bigger than the voltage that the capacitor has run down to by supplying the load for the preceding half-cycle. The cap charges in a burst of current that starts before the peak of each half-cycle, and ends as the half-cycle peak starts back down. Since the current can only flow into the cap for a short part of each half cycle, the power which flows into the cap in that short time has to equal 100% of the power used in the load, so the current peak is BIG.

And big, peaky waveforms have larger RMS values than the same power flowing in smoother, less peaky waveforms, DC being the lowest.

With that as a base, if we load a transformer secondary with a resistor, it can provide the resistor with a current equal to its RMS current rating, assuming we adjust the resistor to get that RMS current flow. We note that amount of power, then rearrange the circuit so the transformer is providing its current through a full wave center tapped rectifier and filter cap arrangement. Since the transformer can only provide its rated RMS current, how much power it can provide to the load will go down because of the peakiness of the rectifier/capacitor arrangement causing a bigger RMS current for a given amount of power into a load. The same thing would happen if we used instead a full wave bridge rectifier.

The math says that a full wave center tapped rectifier arrangement has an RMS current in the transformer of about 1.23 times the DC current in a load connected to the filter cap. So a resistor load is only getting a current of 81.3% of the RMS current in the transformer secondary. For the full wave bridge, it gets worse: the RMS to DC current ratio is 1.65 (more or less, depending on the size of the filter cap compared to the DC load, etc.) so the ratio of DC output current to transformer RMS current is about .606.

Since the tranformer RMS current is what limits the output of any transformer, we can tell that a full wave center tap arrangement on a given transformer will only get 81% of what the transformer would supply into a suitably adjusted resistor. And the same transformer supplying a full wave bridge would only put out 61% of its resistor loading power.

We now have the amount a PFC would "fix" the rectifier circuit: if the trannie is set up in a full wave center tap rectification, a PFC doing a perfect job of correcting to the equivalent current of a resistor load would increase the available DC power out of a filter cap by 100-81.3 = 18.7%. For the same size/power rating transformer loaded as full wave bridge, it would increase it by 100-61 = 39%.

The switching edges and RF/EMI issues remain, but can be handled by careful layout and design.