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Thread: Whammy 1 Obsolete IC chip

  1. #1
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    Whammy 1 Obsolete IC chip

    From what I understand, one of the reasons Digitech discontinued the WH1 was the availability of the main gate array IC being discontinued. From the picture, the ic in question is an LSI Logic L4A0256 and from the schematic it has LMA9K on the main chip. This unit in the picture has a bad PGA IC. I can tell you that it is the A/D of the whole system. I get a sine wave into it but nothing out. Digitech says this chip is non-existent and all searches for it bring up nothing. Does anyone have any insight into this elusive IC chip and if there are drop in replacements?

    CJ
    Attached Thumbnails Attached Thumbnails wh1_cpu.jpg   wh1_main.jpg  

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    Quote Originally Posted by cjlectronics View Post
    From what I understand, one of the reasons Digitech discontinued the WH1 was the availability of the main gate array IC being discontinued. From the picture, the ic in question is an LSI Logic L4A0256 and from the schematic it has LMA9K on the main chip. This unit in the picture has a bad PGA IC. I can tell you that it is the A/D of the whole system. I get a sine wave into it but nothing out. Digitech says this chip is non-existent and all searches for it bring up nothing. Does anyone have any insight into this elusive IC chip and if there are drop in replacements?
    I can tell you about gate arrays.

    There are two kinds, Field Programmable Gate Arrays (FPGAs) and Mask Programmable Gate Arrays (MPGAs). The inside of every gate array is just that - an X-Y array of logic gates of various sorts. You customize the gate array by interconnecting gates in an interconnection layer on top. In concept, this is just like using 7400 or CMOS logic, except you get to use a gate at a time. What could be better? Your very own custom logic chip!!

    Gate arrays come in various sizes (that is, number of gates) and you pick your size to match your application, then use software compilers to compile your logic circuit into connections on the array, and from the array to the I/O pins. With an FPGA, you do this with a flash memory layer on top of the chip. The memory layer remembers which is connected to what. There are some EEPROM FPGAs that have to be programmed every power on by a uC as well. The huge advantage here is that you can reprogram them. But they are slower, and have to be reprogrammed.

    MPGAs are the Caddilac. They are as fast as custom hard logic chips in most cases and need no power-on tending or programming. But that "mask programmable" thing means that the array is personalized by a metal mask ON THE TOP OF THE SILICON CHIP ITSELF. This can only be done in the semiconductor fab with an entire silicon wafer of several hundred chips at a time. Making a mask is very expensive; putting it on silicon is even more. MPGAs always come with (or came with, when I was in the biz) a Non Refundable Expense of $50K and up; "up" means literally whatever. I saw NRE bills of $250 - $500K on our MPGAs.

    And it means NON REFUNDABLE. Your junior engineer made a mistake hooking up logic gates? Sorry. We put YOUR metal layer on YOUR wafer, and here are your chips, working or not. But we'd be happy to do it again for you if you want to try again.

    MPGAs are perfect for many things if you can get over the necessary design, simulation, software verification, NRE, and hardware verification testing. But if you can't fund those things, don't even think about it. They're the classical "if you have to ask, you can't afford it" kind of thing.

    I would guess that having done this once, Digitech was not eager to fund a new set of design, verification, NRE, and manufacture on a replacement chip when the maker of the gate array took it end of life. And that means they're telling you the truth - there aren't any. In fact, no one except Digitech or the original supplier of the chip ever had any of them. Another chip with the same type number that isn't personalized the same way is at best useless and at worst would further damage other stuff.

    Repairing that whammy pedal is simple - find an buy another one, put the replacement's electronics inside the damaged one's housing. That's the only way to repair it.

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    Thank you for the detailed and informative information. So, can this IC be called an ASIC (Application Specific Integrated Circuit)?

    What is the benefit in specifying an MPGA in a design if the cost is so great?

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    Senior Member Enzo's Avatar
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    Once you know your design is right, you can make tens of thousands of them quickly. They come off the fabrication line ready to work - the programming is a part of hte chip. The programmable kind have to be individually programmed, they start as empty.

    The difference between making ten Xerox copies of a document for a meeting versus 100,000 copies of somehting like a newspaper. They make a master copy of the newspaper. Well, used to, now it is digital.

    I defer to RG on the ASIC. In my mind the ASIC is something like a custom chip - for example one that has all the functions needed to control a DVD player deck. Or maybe a chip with some memory, a few A/D channels, and some DSP for a portable hard drive recorder/mixer. I think of gate arrays as logic. But that is only my opinioin.
    Education is what you're left with after you have forgotten what you have learned.

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    Noodle of Reality Steve Conner's Avatar
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    There is another way, find a second Whammy pedal with a different fault and make one good one out of the two.

    But beware Murphy's law which says any Whammy you can find will have the same fault. (I'm only half joking, since it's a valuable pedal, all the faulty ones that can be fixed will probably have been fixed)

    And according to Google that chip is indeed a mask-programmed something or other. These guys seem to think it's just a ROM chip: http://www.circuitsonline.net/forum/view/2888/1/logic

    I find it kind of hard to believe it has an A/D converter onboard as the original poster said.
    Last edited by Steve Conner; 12-09-2008 at 04:21 PM.
    "Enzo, I see that you replied parasitic oscillations. Is that a hypothesis? Or is that your amazing metal band I should check out?"

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    Quote Originally Posted by cjlectronics View Post
    Thank you for the detailed and informative information. So, can this IC be called an ASIC (Application Specific Integrated Circuit)?

    What is the benefit in specifying an MPGA in a design if the cost is so great?
    Enzo is correct on the economics. A mask-programmed anything will be cheaper per unit than a field programmed equivalent. And may have better performance, depending on about ten to the eighth power of details.

    An ASIC is indeed an application specific IC, and tends to be designed from the ground up. Gate arrays started as logic; then they got registers, functional macro cells, and so on. The real difference in my mind is that if you do an ASIC, you can optimize timing by doing your own floor planning (that is, where on the chip the various functional parts go, what's next to what) and probably total density of gates per nano-acre of silicon. The gate array starts out as just that - a sea of gates, which you connect to one another by laying a metal layer over the top. The orientation of the gates, their packing density, where busses run, and the directness of wiring for critical timing is somewhat compromised because you didn't get to custom specify the orientation and wiring of every single gate. The advantage is that you didn't HAVE TO specify the orientation and wiring of every single gate like you do with an ASIC.

    ASIC design done right is not for the faint of heart or pocketbook. It requires many people of specific and highly sought after skills, lots of specialized software, a whallopping great support cadre and lots of computing. Lots. Getting your ASIC put on a wafer means you have to design the entire mask set for the process from zero. This requires intimate knowledge of the actual parameters of the silicon production process to get the masks right and neither waste the innate speed and power features of the process nor waste your time by cutting it too fine to be produced. ASIC design is about a factor of about one hundred times more expensive than gate array design. Actually, gate array customization, not design of the underlying array.

    As you might guess, there is a huge, distributed, and continuing effort all over the technical world to make the fab, gate, layout, and functional design of logic more automated and straightforward. There are big payoffs for the people who can do this successfully. As such, there are many hybrid processes somewhere between full custom logic, ASIC, and gate array designs.

    You pays your money and takes your chances. It's not too hard to drop a hundred million bucks on chip design. Do a few of those and you're talking some real money.

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